Record Citations
APA CitationWilson, P. (2007). Design Recipes for FPGAs: Using Verilog and VHDL. Newnes.
Chicago Style CitationWilson, Peter. Design Recipes for FPGAs: Using Verilog and VHDL. Kidlington GBR: Newnes, 2007.
MLA CitationWilson, Peter. Design Recipes for FPGAs: Using Verilog and VHDL. Newnes, 2007.
Harvard Style CitationWilson, P. 2007. Design Recipes for FPGAs: Using Verilog and VHDL. Kidlington GBR: Newnes.
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